Intune Networks has an opportunity for an experienced FPGA Verification Engineer to join our FPGA Verification Group. The successful candidate will play an integral part in the conception, specification, implementation and execution of verification environments for complex FPGA designs. As a growing, dynamic company, Intune Networks can offer the successful candidate a challenging and rewarding position in an innovation led environment, committed to producing real results.
Qualifications and experience:
Required Skills
Minimum BE qualification required.
5+ years’ experience in RTL Verification from test plan capture through test bench development, testing and signoff.
Experience in System Verilog or SpecmanE including pseudo random test techniques, scenario generation, constraint writing, functional coverage modeling, score boarding and hierarchical test benches.
Assertion writing in System Verilog or similar.
Experience in a Verification Methodology – VMM, OVM, eRM or similar.
Techniques for designing and maintaining reusable verification IP.
Competent in scripting languages (TCL, Make) and design automation.
An understanding of RTL design structure.
Ability to write and converse clearly, concisely and confidently on technical problems, solutions and workarounds.
Technical leadership in a time sensitive development environment.
Excellent team working and communications skills across cross functional teams.
Desirable Skills
Validation experience on real hardware.
Competency in VHDL.
Competency in Perl or Python.
Competency in C/C++/SystemC/TLM.
Synopsys VCS specific Verification tools – RAL, DVE, VMM Planner.
An understanding of release management and SVN.
Experience in verifying packet based telecommunication network designs.
A high level of understanding of common L1-L2 Networking protocols and their hardware implementations.
Experience of interworking between remote sites.
Role can be based in Dublin or Belfast, email applications to
Intune Networks is an Equal Opportunities Employer